1. Field of the Invention
The present invention relates to memory array sense amplifiers, array interconnection, and to memory array structures that comprise mini-gaps disposed between array sections, wherein the mini-gaps act as local sensors for detecting and distributing charge on a digit line and relaying the charge to a main sense amplifier or cell.
2. Description of the Prior Art
Sense amplifiers are essential components of integrated circuits (ICs). A standard memory array structure comprises a plurality of interconnecting word lines and digit lines. Storage devices, such as capacitors, are used for storing charge in a memory cell of the memory array. Access devices, such as transistors, are used for performing write operations to store the charge to the capacitor, and for performing read operations to read the charge stored therein.
In order to write data to a particular memory cell, the memory cell is isolated by activating a word line and digit line at the memory cell location via an access device. The access device is turned on long enough for a particular charge (representing a logical ‘ONE’ or ‘ZERO’) to charge the storage device. In order to then read the data stored therein, the access device will be activated again, so that charge is shared onto the digit line from the storage device. As the digit line has a high capacitance, the charge in the storage device will only result in a slight increase in voltage of the digit line. A sense amplifier is then used to sense the difference in charge between two digit lines, and provide the amplified output by pulling the digit line with higher voltage up to Vcc and pulling the other digit line down to ground.
The memory array described above requires a given area for the sense amplifier to operate within necessary noise and sense margin. The present invention aims to provide a memory array architecture which can provide precision sensing while reducing digit-line-to-digit-line noise as well as reducing the overall sense amplifier footprint.